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ADVANCED IC PACKAGING
ADVANCED IC PACKAGING
| Item | File Name | Download |
|---|---|---|
| 1. | Fan-Out Panel Level Packaging |  |
| 2. | 3D IC Heterogeneous Integration | |
| 3. | 3D IC Through Silicon Via(TSV) | |
| 4. | Magazine_Details_3D IC Wafer Bonding | |
| 5. | Semiconductor-System in Package(SIP) Challenges | |
| 6. | 3D IC Various Through Silicon Via(TSV) | |
| 7. | Semiconductor-Through Silicon Via(TSV) Technology Integration Analysis |
|
| 8. | Micro Electro Mechanical Systems | |
| Contact Person Travis Liang：03-5183030 ext.2202 travis_liang@gptc.com.tw |
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IC FRONT END OF LINE, FEOL
| Item | File Name | Download |
|---|---|---|
| 1. | Wafer backside grinding and stress relief of wet etching process |  |
| 2. | Improving the throughput of silicon wafer stress relief processes | |
| Contact Person Travis Liang：03-5183030 ext.2202 travis_liang@gptc.com.tw |
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OPTOELECTRONICS APPLICATIONS
| Item | File Name | Download |
|---|---|---|
| 1. | Single Wafer Spin Processor Applied to III-V GaAs wet etching |  |
| 2. | LEDinside-Wet etching process improves LED light extraction efficiency throughput and yield | |
| Contact Person Travis Liang：03-5183030 ext.2202 travis_liang@gptc.com.tw |
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